1. Technical Field
The present invention relates to a semiconductor device
2. Related Art
FIG. 6 is a cross-sectional view of a conventional semiconductor device. A semiconductor device 100 includes a semiconductor chip 110 and a base substrate (or a build-up substrate) 130. The semiconductor chip 110 includes a substrate 112 and an interconnect layer 114 provided thereon. A high-frequency interconnect 116 is formed within the interconnect layer 114. The high-frequency interconnect 116 functions as an inductor. Further, pads 118 are formed on the interconnect layer 114.
Such semiconductor chip 110 is flip-chip mounted on the base substrate 130. More specifically, the semiconductor chip 110 is mounted face down (hence, “flipped”) onto the base substrate 130 via bumps 120. Pads 132 are formed on an upper surface of the base substrate 130. Further, interconnects 134 are formed within the base substrate 130.
Prior art documents related to the present invention are, for example, Japanese Patent Application Publication No. 2002-198490, Japanese Patent Application Publication No. 1990(H02)-72660, Japanese Patent Application Publication No. 2006-59959, Japanese Patent Application Publication No. 2004-95777, and the non-patent literature document: Ali Hajimiri et al., entitled “Design Issues in CMOS Differential LC Oscillators”, IEEE JOURNAL OF SOLID-STATE CIRCUITS, Vol. 34, No. 5, May 1999, pp. 717-724.
In the semiconductor device 100 of FIG. 6, however, a magnetic field caused by the high-frequency interconnect 116 induces an eddy current in the associated pads 118 that are disposed under the high-frequency interconnect 116. Then, a magnetic field is induced by Lenz's Law in a direction such that the induced magnetic field opposes the original magnetic field. This causes a variation in the circuit constant of the high-frequency interconnect 116.
A possible approach to such problem is to eliminate the pads 118 from the underneath of the high-frequency interconnect 116, as shown in FIG. 7. This approach can prevent the induction of the eddy current in the pads 118 due to the magnetic field caused by the high-frequency interconnect 116.
However, an eddy current is induced by the generation of the magnetic field caused by the high-frequency interconnect 116, not only in the pads 118 but also in the base substrate 130. The induced eddy current in the interconnects 134 can also be naturally a factor for the variation in the circuit constant of the high-frequency interconnect 116. Such problem is considerably exhibited when the semiconductor chip 110 is mounted face down onto the base substrate 130. This is because a distance between the high-frequency interconnect 116 and the base substrate 130 is shorter than when the semiconductor chip 110 is mounted face up onto the base substrate 130. With the downsizing of the bump 120 in recent years, the distance becomes short, thus causing such a problem.
Further, Since there can be different spatial relationships for their respective possible base substrates 130 between the high-frequency interconnects 116 and the interconnects 134, the degree of deterioration in the transmission characteristics due to the eddy current in the interconnects 134 can be changed, depending on the type of the base substrate 130 (more specifically, the arrangement of the interconnects 134 in the base substrate 130). Therefore, in order to prevent the considerable variation in the transmission characteristics of the high-frequency interconnect 116, regardless of which the type of the base substrate 130 is selected, it is important to inhibit the influence of the eddy current in the interconnects 134.